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Daniel Chavarria

High Performance Computing
Pacific Northwest National Laboratory
PO Box 999
MSIN: J4-30
Richland, WA 99352


Dr. Daniel Chavarría-Miranda is a Senior Research Scientist and the Team Leader of High Performance Computing at PNNL. Chavarría is currently participating in the Department of Energy Office of Science Center for Technology for Advanced Scientific Component Software (TASCS). He also is involved in the DOE ASCR Center for Scalable Parallel Programming Models (PModels2).

Chavarría-Miranda also serves as co-PI for a DoD-funded Center for Adaptive Supercomputing Software-Multithreaded Architectures (CASS-MT), with a focus on scalable highly irregular applications and systems software. He has also served as the Principal Investigator for several PNNL-funded Laboratory Directed Research & Development projects in the application of reconfigurable and hybrid systems to scientific codes. He also has been a collaborator in PNNL-funded LDRD projects in the application of multithreaded systems to non-traditional scientific applications.

Chavarría-Miranda received his M.S./Ph.D. in Computer Science from Rice University in 2004. As part of his doctoral training, Chavarría-Miranda participated in designing and developing key portions of Rice University's dHPF research compiler.

Research Interests

  • Parallel and distributed systems
  • Compilers for high-performance and parallel computing
  • Reconfigurable computing
  • Programming languages
  • Interactions of Architectural features with software systems

Education and Credentials

  • M.S./Ph.D., Computer Science, Rice University, 2004.
  • M.S., Computer Science, Instituto TecnolĂ-gico y de Estudios Superiores de Monterrey, 1998.
  • B.S., Computer Science, Unversidad de Costa Rica, 1994.

Affiliations and Professional Service

  • Team Leader, High Performance Computing, Pacific Northwest National Laboratory, Oct. 2007-Current
  • Senior Research Scientist, Pacific Northwest National Laboratory, Jan. 2005-Current
  • Postdoctoral Research Associate, Rice University, Jan. 2004-Jan. 2005

Awards and Recognitions

  • Best paper award: 2002 International Parallel and Distributed Processing Symposium (IPDPS'02)
  • Best student paper award: 11th International Conference on Parallel Architectures and Compilation Techniques (PACT'02)

PNNL Publications


  • Chavarría-Miranda D, A Panyala, W Ma, A Prantl, and S Krishnamoorthy. 2015. "Global Transformations for Legacy Parallel Applications via Structural Analysis and Rewriting." Parallel Computing 43(March 2015):1-26.  doi:10.1016/j.parco.2015.01.001
  • Kestor G, R Gioiosa, and D Chavarría-Miranda. 2015. "Prometheus: Scalable and Accurate Emulation of Task-Based Applications on Many-Core Systems." In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), March 29-31, 2015, Philadelphia, PA, pp. 308-317.  Institute of Electrical and Electronic Engineers, New York, NY.  doi:10.1109/ISPASS.2015.7095816


  • Chavarría-Miranda D, M Halappanavar, and A Kalyanaraman. 2014. "Scaling Graph Community Detection on the Tilera Many-core Architecture." In 21st International Conference on High Performance Computing (HiPC 2014), December 17-20, 2014, Dona Paula, India.  IEEE, Piscataway, NJ.  doi:10.1109/HiPC.2014.7116708


  • Huang Z, Y Chen, and D Chavarría-Miranda. 2013. "High-Performance Computing for Real-Time Grid Analysis and Operation." In High Performance Computing in Power and Energy Systems. Power Systems, ed. SK Khaitan and A Gupta, pp. 151-188.  Springer, Berlin, Germany. 
  • Tumeo A, O Villa, S Secchi, and D Chavarría-Miranda. 2013. "Efficient Aho-Corasick String Matching on Emerging Multicore Architectures." Chapter 6 in Multicore Computing: Algorithms, Architectures, and Applications, ed. S Rajasekaran, et al, pp. 143-170.  Chapman and Hall/CRC Press, Boca Raton, FL. 


  • Chavarría-Miranda D, S Krishnamoorthy, and A Vishnu. 2012. "Global Futures: a multithreaded execution model for Global Arrays-based applications." In Proceedings of the 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2012), May 13-16, 2012, Ottawa, Canada, pp. 393-401.  Institute of Electrical and Electronics Engineers , Piscataway, NJ.  doi:10.1109/CCGrid.2012.105
  • Panyala AR, D Chavarría-Miranda, and S Krishnamoorthy. 2012. "On the use of term rewriting for performance optimization of legacy HPC applications." In The 41st International Conference on Parallel Processing (ICPP), September 10-13, 2012, Pittsburgh, Pennsylvania, pp. 399-409.  IEEE Computer Society, Los Alamitos, CA.  doi:10.1109/ICPP.2012.44
  • Tumeo A, O Villa, and D Chavarría-Miranda. 2012. "Aho-Corasick String Matching on Shared and Distributed Memory Parallel Architectures." IEEE Transactions on Parallel and Distributed Systems 23(3):436-443.  doi:10.1109/TPDS.2011.181
  • Tumeo A, O Villa, and D Chavarría-Miranda. 2012. "Hardware Architectures for Data-Intensive Computing Problems: A Case Study for String Matching." Chapter 3 in Data-Intensive Computing: Advances, Applications & Architectures, ed. I Gorton and DK Gracio, pp. 24-47.  Cambridge University Press, New York, NY. 


  • Hui PSY, S Chikkagoudar, D Chavarría-Miranda, and MR Johnston. 2011. "Towards a Real-Time Cluster Computing Infrastructure." In Real-Time Systems Symposium (RTSS 2011): The 32nd IEEE Real-Time Systems Symposium, November 29- December 2, 2011, Vienna, Austria, pp. 17-20.  IEEE, Piscataway, NJ. 





  • Chavarría-Miranda D, and A Marquez. 2007. "Assessing the Potential of Hybrid HPC Systems for Scientific Applications: a case study." In Proceedings of the 4th ACM International Conference on Computing Frontiers, May 7-9, 2007, Ischia, Italy, pp. 173-182.  ACM Press, New York, NY.  doi:10.1145/1242531.1242558


  • Chassin DP, PR Armstrong, D Chavarría-Miranda, and RT Guttromson. 2006. "Gauss-Seidel Accelerated: Implementing Flow Solvers on Field Programmable Gate Arrays." In 2006 IEEE Power Engineering Society General Meeting, 18-22 June 2006, p. 5 pages.  Institute of Electrical and Electronics Engineers, Piscataway, NJ. 


  • Chavarría-Miranda D, and JM Mellor-Crummey. 2005. "Effective communication coalescing for data-parallel applications." In Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, June 15-17, 2005, Chicago, Illinois, pp. 14-25.  ACM Press, New York, NY. 
  • Coarfa C, Y Dotsenko, JM Mellor-Crummey, F Cantonnet, T El-Ghazawi, A Mohanti, Y Yao, and D Chavarría-Miranda. 2005. "An Evaluation of Global Address Space Languages: Co-Array Fortran and Unified Parallel C." In Proceedings of the tenth ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP'05, June 15-17, 2005, Chicago, Illinois, pp. 36-47.  ACM Press, New York, NY. 

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