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Silvia Lovergine

High Performance Computing
Post Masters RA
Pacific Northwest National Laboratory
PO Box 999
MSIN: J4-30
Richland, WA 99352
509/375-2427

PNNL Publications

2013

  • Lovergine S, A Tumeo, O Villa, and F Ferrandi. 2013. "YAPPA: a Compiler-Based Parallelization Framework for Irregular Applications on MPSoCs." In IEEE International Symposium on Rapid System Prototyping (RSP 2013), October 3-4, 2013, Montreal, Quebec, Canada, pp. 123-129.  Institute of Electrical and Electronics Engineers , Montreal, Canada.  doi:10.1109/RSP.2013.6683968

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