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Mahantesh Halappanavar

Data Sciences
Pacific Northwest National Laboratory
PO Box 999
MSIN: J4-30
Richland, WA 99352


Dr. Mahantesh Halappanavar joined Pacific Northwest National Laboratory in December 2009. His work focuses on parallel graph algorithms and spans several applications including contingency analysis of electric power grids, statistical textual analysis, numerical linear algebra, information security and fault tolerance. He explores the interplay of algorithm design, architectural features, and input characteristics targeting massively multithreaded architectures such as the Cray XMT and emerging multicore (Intel, AMD) and manycore (nVIDIA) platforms.

Mahantesh graduated in 2009 with a Ph.D. in Computer Science from the Old Dominion University, Norfolk, Virginia. His doctoral research was in the emerging interdisciplinary field known as combinatorial scientific computing (CSC) that employs combinatorial algorithmic techniques to solve scientific computing problems. He developed new approximation algorithms for graph matching â€" a fundamental combinatorial problem with numerous applications in science and engineering. He also developed software targeting the Department of Energy's leadership class machines for the approximate graph matching problem and demonstrated scalability across tens of thousands of processors.

Research Interests

  • Graph Algorithms
  • Parallel Computing
  • Combinatorial Scientific Computing
  • Electric Power Grids
  • Statistical Textual Analysis

Education and Credentials

  • Ph.D., Old Dominion University
  • M.S., Old Dominion University
  • B.E., Karnataka University, India

Affiliations and Professional Service

  • Member of the Society of Industrial and Applied Mathematics (SIAM)
  • Member of the Association for Computing Machinery (ACM)

Awards and Recognitions

  • Recipient of Old Dominion University Graduate Fellowship for year 2005-2006 with the distinction of being best-of-the-best doctoral students
  • Recipient of Dean’s Education Abroad Award in June 2005
  • Second rank in the University for Bachelors degree (B.E.)

PNNL Publications



  • Chavarría-Miranda D, M Halappanavar, and A Kalyanaraman. 2014. "Scaling Graph Community Detection on the Tilera Many-core Architecture." In 21st International Conference on High Performance Computing (HiPC 2014), December 17-20, 2014, Dona Paula, India.  IEEE, Piscataway, NJ.  doi:10.1109/HiPC.2014.7116708
  • Langguth J, MA Azad, M Halappanavar, and F Manne. 2014. "On Parallel Push-Relabel based Algorithms for Bipartite Maximum Matching." Parallel Computing 40(7):289 - 308.  doi:10.1016/j.parco.2014.03.004
  • Manne F, and M Halappanavar. 2014. "New Effective Multithreaded Matching Algorithms." In 28th IEEE International Parallel & Distributed Processing Symposium, May 19-23, 2014, Phoenix, Arizona, pp. 519-528.  IEEE, Piscataway, NJ.  doi:10.1109/IPDPS.2014.61


  • Ramuhalli P, M Halappanavar, JB Coble, and M Dixit. 2013. "Towards A Theory of Autonomous Reconstitution of Compromised Cyber-Systems." In IEEE International Conference on Technologies for Homeland Security (HST 2013), November 12-14, 2013, Waltham, MA, pp. 577-583.  Institute of Electrical and Electronics Engineers Inc., Piscataway, NJ.  doi:10.1109/THS.2013.6699067


  • Azad MA, M Halappanavar, S Rajamanickam, EG Boman, A Khan, and A Pothen. 2012. "Multithreaded Algorithms for Maximum Matching in Bipartite Graphs." In IEEE 26th International Parallel & Distributed Processing Symposium (IPDPS 2012), May 12-25, 2012, Shanghai, China, pp. 860-872.  IEEE Computer Society, Los Alamitos, CA.  doi:10.1109/IPDPS.2012.82
  • Khan A, DF Gleich, A Pothen, and M Halappanavar. 2012. "A Multithreaded Algorithm for Network Alignment Via Approximate Matching." In International Conference for High Performance Computing, Networking, Storage and Analysis (SC), November 10-16, 2012, Salt Lake City, Utah.  Institute of Electrical and Electronics Engineers, Piscataway, NJ.  doi:10.1109/SC.2012.8


  • Adolf RD, DJ Haglin, M Halappanavar, Y Chen, and Z Huang. 2011. "Techniques for Improving Filters in Power Grid Contingency Analysis." In Proceedings of the 7th International Conference on Machine Learning and Data Mining in Pattern Recognition (MLDM), August 30-September 3, 2011, New York. Lecture Notes in Computer Science, vol. 6871, ed. P Perner, pp. 599-611.  Springer-Verlag, Berlin, Germany.  doi:10.1007/978-3-642-23199-5_44
  • Catalyurek U, F Dobrian, AH Gebremedhin, M Halappanavar, and A Pothen. 2011. "Distributed-memory Parallel Algorithms for Matching and Coloring." In IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW 2011), May 16-20, 2011 Anchorage, Alaska, pp. 1971-1980.  Institute of Electrical and Electronics Engineers, Piscataway, NJ.  doi:10.1109/IPDPS.2011.360

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