February 15, 2024
Conference Paper

ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAs

Abstract

Coarse-Grained Reconfigurable Arrays (CGRAs) can achieve higher energy-efficiency than general-purpose processors and accelerators or fine-grained reconfigurable devices, while maintaining adaptability to different computational patterns. CGRAs have shown some success as a platform to accelerate machine learning (ML) thanks to their flexibility, which allows them to support new models not considered by fixed accelerators. However, current solutions for CGRAs employ low level instruction-based compiler approaches and lack specialized compilation infrastructures from high-level ML frameworks that could leverage semantic information from the models, limiting the ability to efficiently map them on the recon- figurable substrate. This paper proposes ML-CGRA, an integrated compilation framework based on the MLIR infrastructure that en- ables efficient ML acceleration on CGRAs. ML-CGRA provides an end-to-end solution for mapping ML models on CGRAs that out- performs conventional approaches by 3.15× and 6.02 × on 4×4 and 8×8 CGRAs, respectively.

Published: February 15, 2024

Citation

Luo Y., C. Tan, N. Bohm Agostini, A. Li, A. Tumeo, N. Dave, and T. Geng. 2023. ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAs. In Proceedings of the 60th ACM/IEEE Design Automation Conference (DAC 2023), July 9-13, 2023, San Franciso, CA, 1-6. Piscataway, New Jersey:IEEE. PNNL-SA-180015. doi:10.1109/DAC56929.2023.10247873